Foundries Disclose Latest Technology Development

United Microelectronics Corp (UMC) recently announced that it has fabricated a push-push voltage-control oscillator (VCO, 雙推式壓控振盪器) with an operating frequency of 192GHz using its 0.13um RFCMOS process technology. One day after UMC's announcement, Taiwan Semiconductor Manufacturing Co Ltd (TSMC) also revealed that its immersion lithography (濕製程) program has produced test wafers well within acceptable parameters for volume manufacturing.

Ben附註 ：
1. Push-Push VCO雙推式壓控振盪器：0.13微米RF CMOS製程技術下產生出192GHz創下了目前矽晶片最高振盪頻率的紀錄，此晶片係由佛羅里達大學甘斯威爾分校電機電腦工程系所的矽微波積體電路與系統研究組所設計。這是取代3-5族體系的技術進步，在RF運用上讓4族更進一步。
2. immersion lithography program 濕製程：奈米製程中最重大的突破。

UMC's Technology Breakthrough
The highest operating frequency for any silicon-based circuit to date is 192GHz. The chip was developed by Silicon Microwave Integrated Circuits and Systems Research Group (SIMICS), Department of Electrical & Computer Engineering at the University of Florida, the US, which also introduced a record setting 105GHz VCO produced by UMC last June.

"UMC's RFCMOS technology is currently being used to power a broad range of advanced wireless applications," said Patrick T Lin, chief SoC architect, System & Architecture Support at UMC. "The VCO demonstrated that UMC's RFCMOS technology is well suited for designs that require extreme levels of performance. We look forward to offering these developments to the mainstream RF design community."

Professor Kenneth O at the University of Florida said, "This is particularly exciting because we produced the VCO using a 0.13um CMOS process. We also have a 140GHz fundamental VCO running in our lab, which has been fabricated using UMC's 90nm logic process. It should be a straightforward matter to turn this into a push-push VCO to generate ~280GHz signal. Furthermore, if a 65nm process is used, we can probably reach 350-400GHz. Generating a THz signal in CMOS technology is not far off."

TSMC's Near-Zero Defect Rates
"Our goal is always zero defects," said Burn Lin, senior director of TSMC's Micropatterning division. TSMC has recently produced multiple test wafers with defect rates as low as three per wafer, comparable to the very best dry lithography results. With defect root causes understood, TSMC can now focus on throughput improvement for high-volume manufacturing."

Immersion lithography systems use water, or a similar clear liquid, as an image-coupling medium. By placing water between the lithographic lens and the semiconductor, engineers can preserve higher-resolution light from the lens, enabling smaller, more densely-packed devices.

But liquid mediums present their own challenges, including defects such as bubbles, watermarks, particles, particle-induced printing defects, and resist residue. TSMC's R&D researchers resolved these issues by developing a proprietary defect-reduction technique that, on initial tests, produced less than seven immersion-induced defects on many 300mm wafers, a defect density of 0.014/cm2. Some wafers have yielded defects as low as three per wafer, or 0.006/cm2. This compares to several hundred thousand defects produced by a prototype immersion scanner without these proprietary techniques.

The immersion lithography technology is targeted at the company's 45nm manufacturing process.

Revenue, Capacity
TSMC's revenue for the fourth quarter ended December 31, 2005 reached NT$81.16 billion, with net income NT$33.9 billion. According to TSMC, as a result of stronger than expected demand across all major product segments, fourth quarter revenue surpassed guidance. Advanced process technologies (0.13um and below) accounted for 49% of wafer revenues while revenues from 90nm process technology alone reached 17% of the total wafer sales. Overall utilization was 104% with 1,629,000 200mm equivalent wafers in the fourth quarter of 2005.

As for UMC, its revenue increased 16.5% to NT$27.47 billion, from NT$23.58 billion in the third quarter of 2005, and decreased 2.7% from NT$28.23 billion in the fourth quarter of 2004. According to UMC, the percentage of revenue from advanced 90nm business increased to 15% from 14% in the third quarter of 2005, mainly due to stronger demand for 90nm communication chips. The percentage of revenue from 0.13um technology increased to 23% due to stronger demand for consumer and communication chips. The percentage of revenue from 0.18um and below increased to 67% in the fourth quarter of 2005 from 61% in the third quarter of 2005. Capacity of UMC in fourth quarter of 2005 was 973,000 200mm equivalent wafers.

by Anita Li